Sensor board with booster and supervisor

[scalz]

Hi guys!

Last night I had a long run thinking how to make my proto rev2. Here is how it looks for the moment.

I hope it will be finished routing this week end. I will have optimizations to do but most difficult is done. Now I am routing the MYSX connector. @Anticimex or someone else, if you have time, could you tell me if my MYSX is right please?

1:VIN 
2:VCC3
3:VCCIO
4:gnd
5:tx
6:rx
7:a6
8:a7
9:d2
10:d3
11:d5
12:d6
13:scl
14:sda
15:d7
16:d8
17:mosi
18:miso
19:sck
20:d10 

Same specs as my prev rev. This version will be better than my previous I think as I have 4layer I can make better and smarter plane (and keep a plane dedicated to gnd). cool . I have added a regulator too. So now I can choose vin_bat/3v dc booster/3v reg 16v max. Jumpers are now smd.
On screenshot, boosters and low power stuff is on the left. in the middle 3 external i2c, rfm and nrf smd are on bottom. Downward are BAT connector, MYSXconnector, AVRSPI.
It is small and if you use nrf it will be a little more higher (maybe 1cm as you can see). maybe I will try to find a little name for fun, MyTinyCamel??? :smiley:
and it is still 0805, so solderable for me. cool!

[Anticimex]

@scalz looks good. Almost identical to my routing for MYSX :)
One thing; consider using something different than d10 for SPI CS as I believe most boards uses that pin for radio SPI CS. It would still work of course but you'll end up with a non-default radio configuration.

[scalz]

@Anticimex. cool. thx. for d10 ok. so in fact pin20 is an external cs pin. I thought it was just atmel rerouting so I rerouted radio cs pin. I am too dumb sometimes! Ok I will look at this tonight. Oh, and I can share my files with you if you are curious. For the moment it is not on my git. I am waiting to be sure..
See you soon.

[Anticimex]

@scalz Correct. The purpose of MYSX_D14_CS is to provide a CS for one SPI slave on the daughterboard (it also doubles as a digital IO called D14). Any digital IO could be used for this but by having a dedicated pin that at least can serve as SPI CS, daughterboards with one SPI device can assume this pin can be used for CS.

[scalz]

just for share. as I am happy.. finally it's all routed, it was some work! maybe I will add an optional led. some check to improve it and I will test dirty or elecrow. I don't know yet..

I modified my pinout for MYSX too.

I like how it looks with rfm69 :smiley:

not bad with nrf smd too

[Anticimex]

Nice and compact :)

[scalz]

thx :smile:
I added a led on sck (like on pro mini). not sure if it is the best pin (dualoptiboot use default D9 if I remember right). I will see. I am improving silkscreen, some vias and some trace now. and need to add a small osh logo. I think I will be able to order it next week. Can't wait to see this tiny camel :smiley:
I am feeling holes are big but it is 3.2mm. maybe I should use 2.2mm but it is small.
on MYSX, now pin15=A0, pin20=D7.

[Anticimex]

@scalz You can check out my updated schematic here. I hope to put up a forum post this weekend.

[scalz]

@Anticimex: thx. your schematics looks very good. I am not so skilled :smiley: I missed one or two decoupling capa I think. I will add those and upload my schem this afternoon to show you.
by sharing we can do so better things:wink:

[Anticimex]

@scalz Practice makes perfect :) What license do you plan to use for your board? Same as me or have you found another OSHW licence that is simpler? I find some aspects of the one I have chosen that I am not too happy with, but I have not found a better one.

[scalz]

@Anticimex: actually I am not very familiar with the license system. I have not taken the time to look at the differences. osh or cc-by-nc-sa??? I need to check what it involves. so for the moment I just paste osh logo to tell it is open source. What aspects don't you like about CERN for example?

[Anticimex]

@scalz Well, it is a bit cumbersome since it require quite a few documents to be included with the product in question. And it stipulates that this documentation should be copied and maintained by anyone basing their work on said product (so I could go after you if I was a evil bastard ;) ) and for the record, I won't. Because I release my work freely, but I still think it is nice to have some formal document to govern the rights of the authour even if there is no money involved.
But I have not found any other license that makes this easier, and since I already ave inncluded the necessary documentation structure to my git, I don't have to worry about anything else than the changelog from now on, so I will probably stick with it.

[scalz]

@Anticimex: ahahah! ok. What you are saying about CERN and its documentation is exactly what I don't like!!! I do this freely too, so I don't care about all this stuff but if it is needed I do it. and I am very glad each time to say who inspired me.
so you think I should stick to CERN? :smiley:
But I agree that copyright, licensing needs some rules for respect to the author. I helped my dad few years ago to get a patent. So I understand the problematic.
I think lots of innovation today are often improvement and mix of others existing good things. and then a patent..

[Anticimex]

@scalz I think my personal stand on this is that I will stick to CERN OHL myself. I do not require anyone to keep CERN OHL even if they copy parts of my work even if the OHL require it (my design, I make my own rules on what I enforce, nobody else will do it for me anyway :) ).
I just think it is good to have some form of "common" license platform that anyone can use or read that formally grants permissions. I am more interested in the "rights" than the "requierds". To me, the license shows everyone that I am formally granting free use of the design. I will of course not discourage anyone from following the formal CERN OHL rules for copying OHL licensed work, but I won't hunt anyone for it. A simple reference to my board in a changelog or similar is plenty! If you worry about the licence, I can also supply a GPG signed statement you could add to a commit where I relieve the licence requirement in case you want to get rid of the CERN stuff "legally". I am not sure it is "legal" for me to do it, but since it is my design in question, I feel I have the right to do any permission I want. And the signature would tell anyone that it really was me giving the permission. But I cannot see why anybody would really care.

[scalz]

@Anticimex: no problem. I totally agree with you and I am happy that we share same vision.

and here it is my temp schematics https://github.com/scalz/MySensors-HW/blob/development/MyTinyCamel/schematics.pdf
capa near mysx vcc and vccio is needed, isn't it?? My vbat measurement is slightly different as I was a little afraid about draining power to gnd...
As you can see my board is more dedicated to be a pure lowpower sensor node. but there are still some options from you.

[scalz]

and I think this board will really fit well in my future flower power like! with a small daughter board for my homemade ec salinity/humdity sensor.

[Anticimex]

@scalz Looks good, and yes, my board is more a generic approach with some power saving features, but I have not gone all in. For instance I elected to skip controlling radio power since it also require re-initialization of the radio, and the savings then depend on the usecase. But for sure, to make it ultra low power, that would be a nice feature to have as well as an option. Unfortunately, I am out of IO for a Arduio Pro Mino "host".
There is no formal requirement for decouplers on the rails to MYSX. I put them there just for insurance as it might simplify daughterboard design. By the way, I did notice a typo in the MYSC spec. It says that it is recommended to support 24V on Vraw but the core team has agreed that 12V is more reasonable. So the spec will be updated to 12V.

[scalz]

@Anticimex: I am happy to hear this. Yes I know for 24v but I was thinking 16v was good for my case. I will see for those capa, if I have enough space. can't be bad. thx for all your advice :smiley:

The only thing which I don't like so much is there is not so much prog space. Maybe I will see in a near future to get some atsam3s1a. but not now, I have enough projects to finish!

[scalz]

so far so good. I have no drc error on any layer. I am still searching for bad looking trace. but I think it will be ok for me :satisfied: I have made minor changes to my schematics too (some capa for dc booster...).
I will certainly send it this week. I need to email dirty and elecrow to see if they are ok if I put 2 boards (4layer) on 5x5 pcb and cut them myself. I am not sure for dirty... I think I will take DHL or EMS! can't wait! Yes I know it's bad :smiley: I have printed pcb on paper to see, and it is very small. cool!

I have made a small doc too. Much more cool with an overview. Here it is:

I will put my design files on my git in 2-3 days. I think it will need a small child board now :wink:

[scalz]

I need to improve the screw holes. could be better I think...