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  3. ๐Ÿ’ฌ The Harvester: ultimate power supply for the Raybeacon DK

๐Ÿ’ฌ The Harvester: ultimate power supply for the Raybeacon DK

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  • M Mishka

    @NeverDie Oh, right. For the voltage source there is the 3V pulse defined as follows:

    PULSE (0 3 20m 1u 1u 60 0)

    Reads like "start pulse from 0V to 3V, after 20ms timeout, 1us raise time, 1us down, keep it on for 60 seconds". This helped to examine how the circuit starts. But the circuit has to start with flat 3V input anyway.

    All MOSFETs are defined with MOS level 3 model, zero-bias threshold (vto) set to ยฑ2 V, transconductance (kp) to 50 mA/V^2 to minimally reproduce a real transistor. Both drain and source has 1 Ohm resistance. Please note, the controlled NFET has lower voltage threshold at 1 V - this defines lowest VinL voltage. The rest of parameters can be derived from the ngspice manual, section 11.2.

    I expect that the ngspice and the LTSPICE may have different directives to setup the circuit :-(

    Also, you may want to drop the C3, M8 and R2 thus leaving the circuit very similar to that one in the paper. The R1 still be used to limit input current, and the C2 will help to model raising voltage.

    Also, does the .tran 10k means 10k milliseconds?

    NeverDieN Offline
    NeverDieN Offline
    NeverDie
    Hero Member
    wrote on last edited by NeverDie
    #154

    @Mishka said in ๐Ÿ’ฌ The Harvester: ultimate power supply for the Raybeacon DK:

    Also, does the .tran 10k means 10k milliseconds?

    Actually 10,000 seconds. :astonished: That was just me throwing in a high enough number such that if there were ever to be observed an effect, I figure it would have shown up within 10,000 seconds. :blush:

    I was playing around with an alternative to the original model, the better to understand how the original model worked, and I came up with something not as great, but maybe (someday, somewhere) it might be useful anyway if used as a trigger for one of the the ALD 20mv mosfets:
    22mv_detector.png
    This is a voltage sweep simulation to show what happens at different input voltages. As you can see from the chart, the voltage on the output (the green line) stays pretty close to 0v up until it reaches around 22mv, at which point it it jumps up about 22mv in value. At that time about 6na of current is being conducted through R1 (the blue line in the graph), and so that is the total amount of current being consumed by the circuit.

    20mv is the minimum that the LTC3108 can startup and function at, so that is why I'm focused at such a low value.

    It's quite an easily adjustable voltage "detector": using smaller values for R2 leads to higher trigger voltages, as well as higher voltages on the output. Of course, they also lead to higher currents, so maybe not so relevant to the matter at hand. However, if you ever need a voltage trigger that you can set to any value in some other context where current draw is not such a pressing concern, this might be an option.

    Also, about 2/3 the current is being consumed by R2. If there were some other way to get a similar effect, but utilizing even less current, then that would be an improvement. Perhaps that's what the Bristol circuit manages to do. Perhaps choking off the current by using a high value for R1 (as in Mishka's simulation) and using a semiconductor of some kind in place of R2 would do the business.

    Edit: And just now noticing that by increasing the value of R1, the threshold for the detection voltage can be raised while keeping the current consumed in the single nanoamp digits:

    higher_threshhold.png

    In this case, with the higher threshhold, it might well be a useful complement to a 20mv ALD mosfet.

    Edit2: Breaking out the resistance still further yields even more useful results: a larger transition voltage and even fewer nanoamperes.
    better.png
    These are just a few random attempts. A more methodical push would probably yield something better. I suppose trying it next with specific simulated components rather than whatever the simulator's generic components are would better inform whether a real world circuit could be built.

    1 Reply Last reply
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    • NeverDieN Offline
      NeverDieN Offline
      NeverDie
      Hero Member
      wrote on last edited by NeverDie
      #155

      Answering my own question, I designed a circuit using "real" mosfets from the generic LTSpice library and got a nice snap transition on a "voltage detector", all while drawing less than 300picoamps:
      real.png

      So, that's a simulated proof of concept. Now I just need to pull the trigger voltage down to a lower number, and I suspect that may involve using mosfets that aren't in the generic LTSpice catalog.

      Edit1: Ignore this particular circuit diagram. It turns out to be reducible to a much simpler circuit that draws even less current. I'm leaving it posted as a reference point for my own project tracking, but if not for that I would delete it.

      Edit2: Lately LTSpice has, more often than not, failed to converge now that I have it simulating "real" mosfets. As a result I've started to look into TI's Tina circuit simulator, which AFAIK is also built on a SPICE platform. Although it's too soon to draw completely fair apples-to-apples comparisons, my initial impression is that TI Tina is much, much faster than LTSpice and also much better at converging. I'll update if that opinion changes.

      Edit3: I've upgraded to using NTJS3151P and NTJS3157N as the simulation mosfets because they have lower threshold voltages and mouser has SPICE models for them that are free to download. I'm not yet endorsing them though, because it's just too early to say. They are just my first attempt, and there may be (probably are) better choices to be found. I'm finding it quite easy to import SPICE component models into TINA TI. I notice that some manufacturers, like Diodes Inc., actually rank their SPICE models as to how realistic they are.

      @Mishka Which mosfets are you simulating? Head's up: I'd encourage you to find some real world simulated mosfets (you'll have to eventually anyway), because I'm found that, at least in LTSpice, the generic mosfets behave much, much differently than the apparently real-world simulated mosfets. Not sure why that would be so, but maybe their idealized nature are a little too idealized to be realistic in these types of circuits.

      TINA TI lacks the convenience of a voltage sweep like LTSpice has, so I'm using a very low frequency triangle wave to approximate it.

      Edit4: I'm starting to make progress with TI Tina towards simulating the original (Figure 5) circuit:
      PROGRESS.png

      After crossing the input threshold voltage, I can either get a steady high signal, as shown here, or by decreasing the value of R1 and increasing the value of C1, I can either make the output do a single sudden transition to zero volts, which then steadily rises afterward with increasing input voltage:
      progress2.png
      or I can make the output go into a rapid oscillation:
      progress3.png
      Tina TI has a preview mode, which is how I was able to spot the oscillation when the simulation progress had otherwise slowed to a crawl. Not sure, but maybe either the oscillation or else (more likely) VF1's sudden transition to zero at the voltage threshold on the prior plot might be useful for driving a charge pump or something?

      Oh, and if it isn't already clear, the green line is the VG1 triangle input voltage (which I'm using to approximate a "voltage sweep") and the brownish-red line is the voltage measured at the VF1 probing point.

      Salient Observation: The "regulated" voltage produced in this simulated circuit is around 700mv, not the ~100mv reported in the Bristol paper. I presume this has to do with the particular mosfets I happened to choose. Perhaps if I can find some mosfets that will produce the 100mv target reported in the Bristol paper, then the rest of the results will fall into place as well. I wish there existed a circuit simulator that could do a "component sweep" to automatically try out a bunch of different mosfets and see what their effects would be. It would gratly accelerate the process of identifying the most desirable component parts that could be used. Seems like it should be an "obvious" feature to have, and yet I'm not aware of any circuit simulators offering it.

      Since 100mv is far below even the Vgs(th) of all the enhancement mosfets in both the digikey and mouser parts catalogs, this seems like yet another clue pointing toward the use of specialty mosfets, such as those by manufactured by ALD. Either that, or fets of a different type are being used.

      Anyway, now that I have a circuit simulator up and working and producing results fairly quickly (unlike LTSpice), it's time to move forward. Hopefully ALD has SPICE models for their parts (yup, for a few of them anyway: http://www.aldinc.com/view-pdf.php). If so, then plugging those in to the simulator to check the effect would seem to be the next step. I'd wager it's either that, or else maybe there are subthreshold effects that the spice simulators aren't modelling accurately.... I discount the later possibility because, well, it's 2020, and surely by now EE simulation tools are pretty well evolved to account for subthreshold effects?

      Edit5: FFS, their POS spice models (last updated in year 2004) won't load into TINA. :angry: Do they load into NGSpice?

      Edit6: Well, using this: https://e2e.ti.com/support/tools/sim-hw-system-design/f/234/t/515230, I was able to fix ALD's stone-age spice file. And now it loads into TINA without complaint. But why the heck does it default to VTN=-0.037. I thought VTN was the threshold voltage for an n-channel mosfet, in which case shouldn't it be a positive number?
      vtn.png

      Edit7: Well, no answer to that question, but I can confirm that VTN is the threshold voltage.
      Edit 8: Taking another look at the UB20M datasheet (https://www.bristol.ac.uk/media-library/sites/engineering/research/eem-group/zero-standby/UB20M_Datasheet_Rev.1.5.pdf), I'd have to say that the very low pico-amps static current number that's advertised is a bit misleading without the context provided by Figure 2,

      which appears to show that the input must be capable of generating a couple of nanoamps at the threshold voltage in order for the voltage to be detected. So if, hypothetically, under particular lighting conditions a small solar panel could produce at most 1na of short-circuit current, it still wouldn't have enough to get detected no matter how large it's open circuit voltage. That said, UB20M still does appear to be the best of breed, if only it were available.

      M 1 Reply Last reply
      1
      • NeverDieN NeverDie

        Answering my own question, I designed a circuit using "real" mosfets from the generic LTSpice library and got a nice snap transition on a "voltage detector", all while drawing less than 300picoamps:
        real.png

        So, that's a simulated proof of concept. Now I just need to pull the trigger voltage down to a lower number, and I suspect that may involve using mosfets that aren't in the generic LTSpice catalog.

        Edit1: Ignore this particular circuit diagram. It turns out to be reducible to a much simpler circuit that draws even less current. I'm leaving it posted as a reference point for my own project tracking, but if not for that I would delete it.

        Edit2: Lately LTSpice has, more often than not, failed to converge now that I have it simulating "real" mosfets. As a result I've started to look into TI's Tina circuit simulator, which AFAIK is also built on a SPICE platform. Although it's too soon to draw completely fair apples-to-apples comparisons, my initial impression is that TI Tina is much, much faster than LTSpice and also much better at converging. I'll update if that opinion changes.

        Edit3: I've upgraded to using NTJS3151P and NTJS3157N as the simulation mosfets because they have lower threshold voltages and mouser has SPICE models for them that are free to download. I'm not yet endorsing them though, because it's just too early to say. They are just my first attempt, and there may be (probably are) better choices to be found. I'm finding it quite easy to import SPICE component models into TINA TI. I notice that some manufacturers, like Diodes Inc., actually rank their SPICE models as to how realistic they are.

        @Mishka Which mosfets are you simulating? Head's up: I'd encourage you to find some real world simulated mosfets (you'll have to eventually anyway), because I'm found that, at least in LTSpice, the generic mosfets behave much, much differently than the apparently real-world simulated mosfets. Not sure why that would be so, but maybe their idealized nature are a little too idealized to be realistic in these types of circuits.

        TINA TI lacks the convenience of a voltage sweep like LTSpice has, so I'm using a very low frequency triangle wave to approximate it.

        Edit4: I'm starting to make progress with TI Tina towards simulating the original (Figure 5) circuit:
        PROGRESS.png

        After crossing the input threshold voltage, I can either get a steady high signal, as shown here, or by decreasing the value of R1 and increasing the value of C1, I can either make the output do a single sudden transition to zero volts, which then steadily rises afterward with increasing input voltage:
        progress2.png
        or I can make the output go into a rapid oscillation:
        progress3.png
        Tina TI has a preview mode, which is how I was able to spot the oscillation when the simulation progress had otherwise slowed to a crawl. Not sure, but maybe either the oscillation or else (more likely) VF1's sudden transition to zero at the voltage threshold on the prior plot might be useful for driving a charge pump or something?

        Oh, and if it isn't already clear, the green line is the VG1 triangle input voltage (which I'm using to approximate a "voltage sweep") and the brownish-red line is the voltage measured at the VF1 probing point.

        Salient Observation: The "regulated" voltage produced in this simulated circuit is around 700mv, not the ~100mv reported in the Bristol paper. I presume this has to do with the particular mosfets I happened to choose. Perhaps if I can find some mosfets that will produce the 100mv target reported in the Bristol paper, then the rest of the results will fall into place as well. I wish there existed a circuit simulator that could do a "component sweep" to automatically try out a bunch of different mosfets and see what their effects would be. It would gratly accelerate the process of identifying the most desirable component parts that could be used. Seems like it should be an "obvious" feature to have, and yet I'm not aware of any circuit simulators offering it.

        Since 100mv is far below even the Vgs(th) of all the enhancement mosfets in both the digikey and mouser parts catalogs, this seems like yet another clue pointing toward the use of specialty mosfets, such as those by manufactured by ALD. Either that, or fets of a different type are being used.

        Anyway, now that I have a circuit simulator up and working and producing results fairly quickly (unlike LTSpice), it's time to move forward. Hopefully ALD has SPICE models for their parts (yup, for a few of them anyway: http://www.aldinc.com/view-pdf.php). If so, then plugging those in to the simulator to check the effect would seem to be the next step. I'd wager it's either that, or else maybe there are subthreshold effects that the spice simulators aren't modelling accurately.... I discount the later possibility because, well, it's 2020, and surely by now EE simulation tools are pretty well evolved to account for subthreshold effects?

        Edit5: FFS, their POS spice models (last updated in year 2004) won't load into TINA. :angry: Do they load into NGSpice?

        Edit6: Well, using this: https://e2e.ti.com/support/tools/sim-hw-system-design/f/234/t/515230, I was able to fix ALD's stone-age spice file. And now it loads into TINA without complaint. But why the heck does it default to VTN=-0.037. I thought VTN was the threshold voltage for an n-channel mosfet, in which case shouldn't it be a positive number?
        vtn.png

        Edit7: Well, no answer to that question, but I can confirm that VTN is the threshold voltage.
        Edit 8: Taking another look at the UB20M datasheet (https://www.bristol.ac.uk/media-library/sites/engineering/research/eem-group/zero-standby/UB20M_Datasheet_Rev.1.5.pdf), I'd have to say that the very low pico-amps static current number that's advertised is a bit misleading without the context provided by Figure 2,

        which appears to show that the input must be capable of generating a couple of nanoamps at the threshold voltage in order for the voltage to be detected. So if, hypothetically, under particular lighting conditions a small solar panel could produce at most 1na of short-circuit current, it still wouldn't have enough to get detected no matter how large it's open circuit voltage. That said, UB20M still does appear to be the best of breed, if only it were available.

        M Offline
        M Offline
        Mishka
        wrote on last edited by
        #156

        @NeverDie Nice reduce!

        AFAIU, the C1+M2 N-MOS will keep the trigger M6+M10 input low, and the output will turn high as soon as input voltage will reach the Vth threshold for the M10. Please note, the output will be limited by the R3=10g, so the circuit is kind of a voltage detector only.

        Have you tried it yet? How about making it oscillating? Also, could you explain please, what the M1 does?

        Please also note, for some reason the original network has the C1 protected with diode built into the MP3 P-FET. This probably should to be simulated with a diode rather FET. How do you think, why they need it?

        NeverDieN 1 Reply Last reply
        0
        • M Mishka

          @NeverDie Nice reduce!

          AFAIU, the C1+M2 N-MOS will keep the trigger M6+M10 input low, and the output will turn high as soon as input voltage will reach the Vth threshold for the M10. Please note, the output will be limited by the R3=10g, so the circuit is kind of a voltage detector only.

          Have you tried it yet? How about making it oscillating? Also, could you explain please, what the M1 does?

          Please also note, for some reason the original network has the C1 protected with diode built into the MP3 P-FET. This probably should to be simulated with a diode rather FET. How do you think, why they need it?

          NeverDieN Offline
          NeverDieN Offline
          NeverDie
          Hero Member
          wrote on last edited by NeverDie
          #157

          @Mishka I'm rethinking the global strategy to emphasize minimizing leakage currents above all else, even if it means accepting higher threshold voltages. It's tough, though, because none of the parametric search engines (like Digikey or Mouser) appear to allow mosfet searches based on leakage currents. It's in the datasheets, but not searchable as far as I can tell. And with tens of thousands of mosfets to choose from, there are far too many to methodically review manually. So far leakage currents of 100na to 1ua seem common, and I need to find some mosfets which are much, much less than that or else this project will be academic. Maybe there's a way to leverage that Vishay load switch you identified (https://www.vishay.com/docs/66597/sip32431.pdf). Not sure how to proceed at the moment until some suitable real-world low-leakage mosfets can be identified.

          A FemtoFET would be at least some improvement over what's comon (http://www.ti.com/lit/ds/symlink/csd15380f3.pdf), but it still lists fairly large MAX leakage amounts with no indication as to what typical leakage might be.

          Nexperia lists some low leakage mosfets: https://assets.nexperia.cn/documents/application-note/AN90009.pdf
          but I'd like to find lower leakage than even those, if possible.

          Ideally low leakage and low threshold would go hand in hand, as lower voltages generally imply lower leakages also, at least for any given mosfet.

          M 1 Reply Last reply
          1
          • NeverDieN NeverDie

            @Mishka I'm rethinking the global strategy to emphasize minimizing leakage currents above all else, even if it means accepting higher threshold voltages. It's tough, though, because none of the parametric search engines (like Digikey or Mouser) appear to allow mosfet searches based on leakage currents. It's in the datasheets, but not searchable as far as I can tell. And with tens of thousands of mosfets to choose from, there are far too many to methodically review manually. So far leakage currents of 100na to 1ua seem common, and I need to find some mosfets which are much, much less than that or else this project will be academic. Maybe there's a way to leverage that Vishay load switch you identified (https://www.vishay.com/docs/66597/sip32431.pdf). Not sure how to proceed at the moment until some suitable real-world low-leakage mosfets can be identified.

            A FemtoFET would be at least some improvement over what's comon (http://www.ti.com/lit/ds/symlink/csd15380f3.pdf), but it still lists fairly large MAX leakage amounts with no indication as to what typical leakage might be.

            Nexperia lists some low leakage mosfets: https://assets.nexperia.cn/documents/application-note/AN90009.pdf
            but I'd like to find lower leakage than even those, if possible.

            Ideally low leakage and low threshold would go hand in hand, as lower voltages generally imply lower leakages also, at least for any given mosfet.

            M Offline
            M Offline
            Mishka
            wrote on last edited by
            #158

            @NeverDie That's true, discrete transistors have not too thin parameters on paper. But assuming quite low voltages (about 3V) I'd expect those Nexperia and TI transistors may draw picoamps indeed. I think this is better to check with real devices. But assuming how small they are an evaluation board will be required. There are some, but it might be way cheaper yet more flexible to assemble such a module manually.

            For convenience, the custom PCB may also contain circuit required to measure the leakage. Perhaps a low-leakage capacitor may be charged to some known value, then a MOSFET (or number of FOSFETS in parallel) would discharge it for some time, and then the voltage drop can derive leakage.

            NeverDieN 3 Replies Last reply
            1
            • M Mishka

              @NeverDie That's true, discrete transistors have not too thin parameters on paper. But assuming quite low voltages (about 3V) I'd expect those Nexperia and TI transistors may draw picoamps indeed. I think this is better to check with real devices. But assuming how small they are an evaluation board will be required. There are some, but it might be way cheaper yet more flexible to assemble such a module manually.

              For convenience, the custom PCB may also contain circuit required to measure the leakage. Perhaps a low-leakage capacitor may be charged to some known value, then a MOSFET (or number of FOSFETS in parallel) would discharge it for some time, and then the voltage drop can derive leakage.

              NeverDieN Offline
              NeverDieN Offline
              NeverDie
              Hero Member
              wrote on last edited by NeverDie
              #159

              @Mishka Perhaps of relevance to your last point, I found a fairly similar looking circuit to the Figure 5 Bristol paper UB40M circuit. Not identical, but I think you'll recognize some common features, like cutting off the feedback after a threshold has been reached and the use of n-channel and p-channel mosfet pairs configured as inverters:
              picowatts.png
              It's a bit different in that it's an oscillator circuit (not too surprising, as I showed above that the Bristol circuit can be made to oscillate also), but what's comforting is the authors claim it consumes just 4.2picowatts.
              picowatts2.png
              However, having become a bit jaded by now, I do wonder whether that 4.2 picowatts reflects only the supply current or whether it includes the leakage currents as well. :face_with_rolling_eyes: If it's the "all in" number, then maybe it's better than the Bristol design. I'm guessing that when they say their design minimizes "short circuit current," they are referring to leakage current (?), and if so, that would maybe be directly helpful to the problem of avoiding too much leakage currents in whatever discrete component circuitry you and I might settle on.

              https://ieeexplore.ieee.org/document/7426716

              1 Reply Last reply
              1
              • M Mishka

                @NeverDie That's true, discrete transistors have not too thin parameters on paper. But assuming quite low voltages (about 3V) I'd expect those Nexperia and TI transistors may draw picoamps indeed. I think this is better to check with real devices. But assuming how small they are an evaluation board will be required. There are some, but it might be way cheaper yet more flexible to assemble such a module manually.

                For convenience, the custom PCB may also contain circuit required to measure the leakage. Perhaps a low-leakage capacitor may be charged to some known value, then a MOSFET (or number of FOSFETS in parallel) would discharge it for some time, and then the voltage drop can derive leakage.

                NeverDieN Offline
                NeverDieN Offline
                NeverDie
                Hero Member
                wrote on last edited by NeverDie
                #160

                @Mishka said in ๐Ÿ’ฌ The Harvester: ultimate power supply for the Raybeacon DK:

                @NeverDie That's true, discrete transistors have not too thin parameters on paper. But assuming quite low voltages (about 3V) I'd expect those Nexperia and TI transistors may draw picoamps indeed. I think this is better to check with real devices. But assuming how small they are an evaluation board will be required. There are some, but it might be way cheaper yet more flexible to assemble such a module manually.

                For convenience, the custom PCB may also contain circuit required to measure the leakage. Perhaps a low-leakage capacitor may be charged to some known value, then a MOSFET (or number of FOSFETS in parallel) would discharge it for some time, and then the voltage drop can derive leakage.

                I spoke too soon regarding the femtofets: they're frickin tiny, at about 0.6mm^2. That's not good from the standpoint of minimizing leakage current:
                smallnotgood.png

                Edit1: I couldn't find a SPICE model for either Vishay SiP32431 or SiP32432. I sent an inquiry to Vishay, but I don't have high hopes they'll produce one. :disappointed: It has great specs though, so thank you for bringing it to my attention. Prior to learning of it I had been using http://www.ti.com/lit/ds/symlink/tps22860.pdf, which I had found to be a very handy chip. Ironically, it doesn't have a SPICE model either! Gosh, what is wrong with these manufacturers? Are they really too cheap/lazy to spice model their own chips, or is there some other reason for not making SPICE models readily available for every product in their catalog?

                Edit2: I've converted over to using the ALD "subtreshold" n-channel and p-channel mosfets. I had to hack the spice files to get Tina TI to import the spice models. Hopefully I was able to preserve their accuracy.

                Edit3: What's interesting is that even after substituting the super sensitive ALD parts into the circuit, the trigger voltage remains about 700mv.
                triggerVoltage.png
                Maybe the 700mv is a reflection of the particular ALD mosphets that I included in the simulation. This was just the first attempt. Maybe different ALD mosfet choices would yield a lower trigger voltage for the circuit.

                Edit4: I received a reply from Vishay regarding their load switch. It reads: " Unfortunately, we donโ€™t have its SPICE model. Internally it is a P-ch switch, gate is injected with a constant current during turn on."

                1 Reply Last reply
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                • NeverDieN Offline
                  NeverDieN Offline
                  NeverDie
                  Hero Member
                  wrote on last edited by NeverDie
                  #161

                  Some modest progress. If the TINA TI simulator is to be believed, then this circuit:
                  modest_progress.png
                  delivers a very clean 1 second pulse at VF2 about once every 10 minutes while consuming an average of about 6na. The one big caveat though is that it requires a 2v supply voltage.

                  It's mainly noteworthy in comparison to TI's TPL5xxx timer, which consumes about 6x more current.

                  The main objective was to have a very low power timer circuit that could wake up infrequentlly to briefly invoke a conventional voltage detection circuit, which in turn could activate an energy harvester to process the energy captured and stored on a capacitor, provided there was enough charge on the capacitor to justify it. This does seem like a good step in that direction, though it would, of course, be preferable to have a circuit which consumes mere pico amps instead of nanoamps.

                  If nothing else it would perhaps make for a very low energy wake-up timer for a wireless sensor device. Alternatively, maybe it could form the start of a discontinuous charge pump circuit.

                  It would be interesting to build the circuit as a check on the simultator's accuracy and also just to see if it actually works.

                  Just a WAG, but I'm guessing that upgrading the circuit to use transistors which have a higher beta and reduced leakage currents will allow the circuit to still function while consuming even lower supply currents.

                  Edit1: Also, if I were to use gallium arsenide transistors (or whatever other transistors that have a lower forward voltage drop), it should run at a lower voltage. Perhaps a lower current as well? No idea, as I've never looked into gallium arsenide transistors before.

                  NeverDieN 1 Reply Last reply
                  1
                  • NeverDieN NeverDie

                    Some modest progress. If the TINA TI simulator is to be believed, then this circuit:
                    modest_progress.png
                    delivers a very clean 1 second pulse at VF2 about once every 10 minutes while consuming an average of about 6na. The one big caveat though is that it requires a 2v supply voltage.

                    It's mainly noteworthy in comparison to TI's TPL5xxx timer, which consumes about 6x more current.

                    The main objective was to have a very low power timer circuit that could wake up infrequentlly to briefly invoke a conventional voltage detection circuit, which in turn could activate an energy harvester to process the energy captured and stored on a capacitor, provided there was enough charge on the capacitor to justify it. This does seem like a good step in that direction, though it would, of course, be preferable to have a circuit which consumes mere pico amps instead of nanoamps.

                    If nothing else it would perhaps make for a very low energy wake-up timer for a wireless sensor device. Alternatively, maybe it could form the start of a discontinuous charge pump circuit.

                    It would be interesting to build the circuit as a check on the simultator's accuracy and also just to see if it actually works.

                    Just a WAG, but I'm guessing that upgrading the circuit to use transistors which have a higher beta and reduced leakage currents will allow the circuit to still function while consuming even lower supply currents.

                    Edit1: Also, if I were to use gallium arsenide transistors (or whatever other transistors that have a lower forward voltage drop), it should run at a lower voltage. Perhaps a lower current as well? No idea, as I've never looked into gallium arsenide transistors before.

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                    NeverDie
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                    wrote on last edited by NeverDie
                    #162

                    @NeverDie said in ๐Ÿ’ฌ The Harvester: ultimate power supply for the Raybeacon DK:

                    Just a WAG, but I'm guessing that upgrading the circuit to use transistors which have a higher beta and reduced leakage currents will allow the circuit to still function while consuming even lower supply currents.

                    BINGO! According to the simulation, substituting transistors with higher beta reduced the average current to less than a nanoamp:
                    lessThan1NanoAmp.png
                    In this configuration, the pulses are separated by about 1600 seconds, which is about 26 minutes, once it gets going. Also, the minimum voltage is now just 1 volt, as compared to 2 volts with the earlier transistors. If there are transistors with even better beta, perhaps the current consumption can be dropped even further. What are some good transistors to try that have exceptionally high beta?
                    :+1:

                    Edit1: Substituting the higher beta ZTX788B for the PNP transistor and increasing some of the other component values, I was able to drop the voltage to 0.8v and the average current consumed to around 200 picoamps. :)
                    200picoamp.png
                    For the first build I intend to use all through-hole components to better mitigate against leakage currents, so I need to find a high beta through-hole NPN that's as good or better than the 2SD2704 NPN used in the simulated circuit. If that goes well then I'll try a surface mount build for comparison. 2N5963 is available in through-hole and has a fairly high beta (between 1200 and 2200), but I see no spice model for it. Soon I may have to learn how to make my own transistor spice models so I can be free from this limitation.

                    I thought maybe Darlington transistors, because of their high beta, were a logical extrapolation of the results so far and therefore might offer the ultimate performance. I did make one attempt subtituting a BC517 darlington with 30,000 beta for just the NPN, but doing that I so far had no luck getting the circuit to oscillate. Maybe both the NPN and PNP need to be darlington's for it to work? Perhaps a BC516 PNP Darlington would be a good match for it, as it too has a minimum beta of 30,000.

                    Also, for troubleshooting, I need to find a way to accurately measure picoamps. I already own a uCurrent Gold, and according to its description (https://www.eevblog.com/product/ucurrentgold/) , if paired with a 5.5 digit volt meter, it can measure down to 1 picoamp. I just recently acquired an Amprobe AM-160-A 500,000 count multimeter, so hopefully that will do the business. Amprobe claims that the DC voltage accuracy is +/- (0.03 % rdg + 2 LSD). For such tiny currents I expect measurement noise may be an issue, so I'm only hoping for accuracy down to 10pa, which should be good enough for present purposes.

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                    • M Mishka

                      @NeverDie That's true, discrete transistors have not too thin parameters on paper. But assuming quite low voltages (about 3V) I'd expect those Nexperia and TI transistors may draw picoamps indeed. I think this is better to check with real devices. But assuming how small they are an evaluation board will be required. There are some, but it might be way cheaper yet more flexible to assemble such a module manually.

                      For convenience, the custom PCB may also contain circuit required to measure the leakage. Perhaps a low-leakage capacitor may be charged to some known value, then a MOSFET (or number of FOSFETS in parallel) would discharge it for some time, and then the voltage drop can derive leakage.

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                      wrote on last edited by NeverDie
                      #163

                      @Mishka This paper is a breakthrough of sorts: http://blaauw.engin.umich.edu/wp-content/uploads/sites/342/2017/11/568.pdf

                      Using dynamic leak supression, that university team has proven in real hardware that they're able to power a Cortex M0 using just 240lux with just a teeny-tiny, itty-bitty solar cell ( 0.09mm^2)that they fabricated onto the MCU die itself:
                      dls.png

                      No battery or supercap! It simply runs whenever there's at least 240lux light. The good news is that the DLS circuitry is just a variation on an ordinary ring oscillator, and it looks as though it would be easy to implement using discrete components.

                      I have a first attempt of it working in simulation, using ALD parts, which oscillates however fast or slow as I want it to while consuming an average of about 20pa. That much is like a dream come true. It needs improvement to get a better voltage swing and a lower supply voltage, but it's a promising start.

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                      • NeverDieN NeverDie

                        @Mishka This paper is a breakthrough of sorts: http://blaauw.engin.umich.edu/wp-content/uploads/sites/342/2017/11/568.pdf

                        Using dynamic leak supression, that university team has proven in real hardware that they're able to power a Cortex M0 using just 240lux with just a teeny-tiny, itty-bitty solar cell ( 0.09mm^2)that they fabricated onto the MCU die itself:
                        dls.png

                        No battery or supercap! It simply runs whenever there's at least 240lux light. The good news is that the DLS circuitry is just a variation on an ordinary ring oscillator, and it looks as though it would be easy to implement using discrete components.

                        I have a first attempt of it working in simulation, using ALD parts, which oscillates however fast or slow as I want it to while consuming an average of about 20pa. That much is like a dream come true. It needs improvement to get a better voltage swing and a lower supply voltage, but it's a promising start.

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                        wrote on last edited by
                        #164

                        @NeverDie Wow, my congratulations on making so much progress! Diving below 1nA is serious achievement!

                        The paper on the batteryless sub-nW Cortex-M0 shows a state of the art circuit built with FETs in super cut-off state. Thanks for finding it! But this makes me think that from all the networks we've considered here - the 3nA oscillator by David Johnson, the ready to use 10nA solar-powered motor driver by Stepan Novotill, and the UB40M chip by Bristol - due to some leakage elimination techniques a MOSFET based circuit might have the best performance anyway. The essay on femtoampere circuits also suggests FETs for lower leakage. (But I admit I still extremely impressed about those two BJT circuits.)

                        The relaxation oscillator with 230 fJ/cycle efficiency is also voltage driven, i.e. based on MOSFETs with proper threshold. Similarly to the UB40M it uses capacitors for time adjustment. By chance, detailed description is available for free as part of the Ultra-low energy electronics for synthetic biological sensors paper, please see chapter 3.

                        Components selection still play important part here, but assuming no femtoamp level I don't think package size will be too important. Enough clearance around elements may work similarly well. Regarding threshold values, the bigger voltage should be applied to the gate in order to close the transistor, the less leakage current between source and drain may be expected. This is exactly the reason why super cut-off state gates are working so well. The nice overview of this and other leakage elimination techniques described in the Design and Modeling of Low Power VLSI Systems book the relevant chapter from which is available as a dedicated paper. Perhaps it could help optimize current leakage later when the concept will be more or less ready.

                        The pragmatic question still how the desired circuit should work. I think the major finding was that a-Si cells are capable of high voltage in very low light conditions. This allows to avoid overhead and complexity coming from extra charge pumps or other regulators, and drive MCUs and sensors (usually working in 1.8V to 3.6V range) from a store capacitor charged directly from the a-Si cell. Another big advantage is that such a circuit will have nearly zero cold boot current.

                        How low should it go? The measured cell you use for experiments produce current in nanoamps, and when the cell current goes down to picoamps the voltage level seem also drops significantly. Also, waiting for the capacitor to charge from a picoamp source may take forever. IMHO targeting sources with few tens of nanoamps, and therefore maintaining the harvester self current less than 1 nanoampere should be considered a great success. Of course, the less quiescent current the harvester has - the better.

                        For such a low-power source I'd expect the energy will be harvested for a long period of time (tens of minutes), and then dumped it all at once into the MCU and a sensor. Using the collected energy to charge a battery is impractical: modern devices require microwatts of energy, and the harvester simply can not withstand the consumption. For online operation a conventional harvester like the AEM10941 should be used.

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                        • M Mishka

                          @NeverDie Wow, my congratulations on making so much progress! Diving below 1nA is serious achievement!

                          The paper on the batteryless sub-nW Cortex-M0 shows a state of the art circuit built with FETs in super cut-off state. Thanks for finding it! But this makes me think that from all the networks we've considered here - the 3nA oscillator by David Johnson, the ready to use 10nA solar-powered motor driver by Stepan Novotill, and the UB40M chip by Bristol - due to some leakage elimination techniques a MOSFET based circuit might have the best performance anyway. The essay on femtoampere circuits also suggests FETs for lower leakage. (But I admit I still extremely impressed about those two BJT circuits.)

                          The relaxation oscillator with 230 fJ/cycle efficiency is also voltage driven, i.e. based on MOSFETs with proper threshold. Similarly to the UB40M it uses capacitors for time adjustment. By chance, detailed description is available for free as part of the Ultra-low energy electronics for synthetic biological sensors paper, please see chapter 3.

                          Components selection still play important part here, but assuming no femtoamp level I don't think package size will be too important. Enough clearance around elements may work similarly well. Regarding threshold values, the bigger voltage should be applied to the gate in order to close the transistor, the less leakage current between source and drain may be expected. This is exactly the reason why super cut-off state gates are working so well. The nice overview of this and other leakage elimination techniques described in the Design and Modeling of Low Power VLSI Systems book the relevant chapter from which is available as a dedicated paper. Perhaps it could help optimize current leakage later when the concept will be more or less ready.

                          The pragmatic question still how the desired circuit should work. I think the major finding was that a-Si cells are capable of high voltage in very low light conditions. This allows to avoid overhead and complexity coming from extra charge pumps or other regulators, and drive MCUs and sensors (usually working in 1.8V to 3.6V range) from a store capacitor charged directly from the a-Si cell. Another big advantage is that such a circuit will have nearly zero cold boot current.

                          How low should it go? The measured cell you use for experiments produce current in nanoamps, and when the cell current goes down to picoamps the voltage level seem also drops significantly. Also, waiting for the capacitor to charge from a picoamp source may take forever. IMHO targeting sources with few tens of nanoamps, and therefore maintaining the harvester self current less than 1 nanoampere should be considered a great success. Of course, the less quiescent current the harvester has - the better.

                          For such a low-power source I'd expect the energy will be harvested for a long period of time (tens of minutes), and then dumped it all at once into the MCU and a sensor. Using the collected energy to charge a battery is impractical: modern devices require microwatts of energy, and the harvester simply can not withstand the consumption. For online operation a conventional harvester like the AEM10941 should be used.

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                          wrote on last edited by NeverDie
                          #165

                          @Mishka I'm flexible. Which circuit are you most interested in building? Let's try putting it together with real hardware and see if we can get it to work. If we can't, then we just move on to the next circuit and keep trying until we find a circuit that does work. Fair enough?

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                          • NeverDieN NeverDie

                            @Mishka I'm flexible. Which circuit are you most interested in building? Let's try putting it together with real hardware and see if we can get it to work. If we can't, then we just move on to the next circuit and keep trying until we find a circuit that does work. Fair enough?

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                            Mishka
                            wrote on last edited by
                            #166

                            @NeverDie More than enough :-)

                            It seems there are two more or less working BJT based circuits which can be tested easily - the 3 nA oscillator which you've modeled with different transistors, and the solar motor project. Both are way more low-power than existing harvesters.

                            The FET based circuit remains in doubt until suitable components were selected. But IMHO putting some FETs to test to measure D-S leakage would surprise with numbers.

                            Regarding application, I have no requirement for so ultra-low power system, but many examples do measure something and then broadcast the data via BLE. They may even use harvesting switches, like the On Semi BLE-SWITCH001-GEVB evaluation kit. Maybe we can also consider something like this? If you have any good app on your mind lets aim at it.

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                            • M Mishka

                              @NeverDie More than enough :-)

                              It seems there are two more or less working BJT based circuits which can be tested easily - the 3 nA oscillator which you've modeled with different transistors, and the solar motor project. Both are way more low-power than existing harvesters.

                              The FET based circuit remains in doubt until suitable components were selected. But IMHO putting some FETs to test to measure D-S leakage would surprise with numbers.

                              Regarding application, I have no requirement for so ultra-low power system, but many examples do measure something and then broadcast the data via BLE. They may even use harvesting switches, like the On Semi BLE-SWITCH001-GEVB evaluation kit. Maybe we can also consider something like this? If you have any good app on your mind lets aim at it.

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                              wrote on last edited by NeverDie
                              #167

                              @Mishka Looking back over it with fresh eyes now, maybe the peak current rate matters no less than the average current rate. With the 200pa average transistor oscillator (above), there are some very short but significant current spikes that a weak solar cell that's not producing much current might not get past.

                              Perhaps better would be something like this nmos ring oscillator, whose current draw never exceeds 3.6na? For example:
                              NMOS_RING_OSCILLATOR.png

                              I couldn't get this particular n-channel mosfet to oscillate at less than 3v, but maybe some other nmos would.

                              At this particular point I think I'm most interested in getting a DLS oscillator to work, first in simulation and then in real hardware. It may or may not be overkill, but it seems to hold the most potential.

                              But, of course, you're right: knowing the app would pin this down. I suppose right now I'm still getting a feel for what might be possible.

                              There might be some side benefits as well, such as perhaps schmitt triggers that don't pull a lot of current near their transition point:
                              leakage-optimized_Schmitt-Trigger.png
                              https://books.google.com/books?id=BxX_DQAAQBAJ&pg=PA337&lpg=PA337&dq=leakage+optimized+schmitt+trigger&source=bl&ots=SpqKp_p2WK&sig=ACfU3U13AjqgaLMWrsxbKil79lsI4L6vKA&hl=en&sa=X&ved=2ahUKEwiN3NiZ0YXpAhUMP60KHeLEAGoQ6AEwCXoECAoQAQ#v=onepage&q=leakage optimized schmitt trigger&f=false

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                              • NeverDieN NeverDie

                                @Mishka Looking back over it with fresh eyes now, maybe the peak current rate matters no less than the average current rate. With the 200pa average transistor oscillator (above), there are some very short but significant current spikes that a weak solar cell that's not producing much current might not get past.

                                Perhaps better would be something like this nmos ring oscillator, whose current draw never exceeds 3.6na? For example:
                                NMOS_RING_OSCILLATOR.png

                                I couldn't get this particular n-channel mosfet to oscillate at less than 3v, but maybe some other nmos would.

                                At this particular point I think I'm most interested in getting a DLS oscillator to work, first in simulation and then in real hardware. It may or may not be overkill, but it seems to hold the most potential.

                                But, of course, you're right: knowing the app would pin this down. I suppose right now I'm still getting a feel for what might be possible.

                                There might be some side benefits as well, such as perhaps schmitt triggers that don't pull a lot of current near their transition point:
                                leakage-optimized_Schmitt-Trigger.png
                                https://books.google.com/books?id=BxX_DQAAQBAJ&pg=PA337&lpg=PA337&dq=leakage+optimized+schmitt+trigger&source=bl&ots=SpqKp_p2WK&sig=ACfU3U13AjqgaLMWrsxbKil79lsI4L6vKA&hl=en&sa=X&ved=2ahUKEwiN3NiZ0YXpAhUMP60KHeLEAGoQ6AEwCXoECAoQAQ#v=onepage&q=leakage optimized schmitt trigger&f=false

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                                wrote on last edited by NeverDie
                                #168

                                @NeverDie said in ๐Ÿ’ฌ The Harvester: ultimate power supply for the Raybeacon DK:

                                but maybe some other nmos would.

                                ... and I think I may have just now found that mosfet.

                                According to simulation, this oscillator consumes less than 25 picoamps at all times if running at 350 millivolts:
                                350mv_25pa.png
                                In fact, with higher resistor values, it will oscillate at even lower currents than that. Thus, even a solar cell in extremely dim light should be able to power it. Also nice: the same circuit runs at higher voltages if you want/need a larger voltage swing.

                                I think I'll order the parts and build it. Wish me luck!

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                                • NeverDieN NeverDie

                                  @NeverDie said in ๐Ÿ’ฌ The Harvester: ultimate power supply for the Raybeacon DK:

                                  but maybe some other nmos would.

                                  ... and I think I may have just now found that mosfet.

                                  According to simulation, this oscillator consumes less than 25 picoamps at all times if running at 350 millivolts:
                                  350mv_25pa.png
                                  In fact, with higher resistor values, it will oscillate at even lower currents than that. Thus, even a solar cell in extremely dim light should be able to power it. Also nice: the same circuit runs at higher voltages if you want/need a larger voltage swing.

                                  I think I'll order the parts and build it. Wish me luck!

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                                  Mishka
                                  wrote on last edited by Mishka
                                  #169

                                  @NeverDie The circuit looks like a parametric oscillator indeed, and it is cool! What I like about it (of course, if I get it right) is that it employs only one transistor model, and those gigohm resistors are maintaining the current consumption really low. For this reason there is no need to carefully select the transistors - everything that has appropriate gate threshold value should work just fine.

                                  On the other hand, it might happen that if you need it to work at higher frequency you will have to lower resistance of the R1-R3 and thus increase the current consumption.

                                  BTW, accordingly to datasheet those particular FETs has quite high D-S leakage up to 1 ยตA. But again, should not be an issue. Perhaps, while you're here and have tools to measure picoamps, you might be interested to grab a couple of those Femto N-FETs or other officially low leakage transistors, just to compare them to others. In particular, put them against a usual FET in the super-cutoff state, i.e. when supplying negative gate-source voltage.

                                  And, of course, I wish you best of luck with this experiment :biohazard_sign: and look forward for your updates! :hand_with_index_and_middle_fingers_crossed:

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                                  • M Mishka

                                    @NeverDie The circuit looks like a parametric oscillator indeed, and it is cool! What I like about it (of course, if I get it right) is that it employs only one transistor model, and those gigohm resistors are maintaining the current consumption really low. For this reason there is no need to carefully select the transistors - everything that has appropriate gate threshold value should work just fine.

                                    On the other hand, it might happen that if you need it to work at higher frequency you will have to lower resistance of the R1-R3 and thus increase the current consumption.

                                    BTW, accordingly to datasheet those particular FETs has quite high D-S leakage up to 1 ยตA. But again, should not be an issue. Perhaps, while you're here and have tools to measure picoamps, you might be interested to grab a couple of those Femto N-FETs or other officially low leakage transistors, just to compare them to others. In particular, put them against a usual FET in the super-cutoff state, i.e. when supplying negative gate-source voltage.

                                    And, of course, I wish you best of luck with this experiment :biohazard_sign: and look forward for your updates! :hand_with_index_and_middle_fingers_crossed:

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                                    Hero Member
                                    wrote on last edited by NeverDie
                                    #170

                                    @Mishka I tried looking into the ultra low leakage Fets, like the femtofet, but they are just impossibly small:
                                    alt text

                                    If you know of any that are of a more manageable size, please do let me know. Partly it's just very tiny to handle, but also with the pads so incredibly close, I'm afraid there might be leakage outside the chip due to their close proximity.

                                    I'm actually quite keen to try the Vishay SiP32431/2, but digikey and mouser don't have the larger package size (SC70-6) in stock, just the very small size packages. When that changes, I'll buy some to try. If there's some other source, I could try that.

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                                    • M Mishka

                                      @NeverDie The circuit looks like a parametric oscillator indeed, and it is cool! What I like about it (of course, if I get it right) is that it employs only one transistor model, and those gigohm resistors are maintaining the current consumption really low. For this reason there is no need to carefully select the transistors - everything that has appropriate gate threshold value should work just fine.

                                      On the other hand, it might happen that if you need it to work at higher frequency you will have to lower resistance of the R1-R3 and thus increase the current consumption.

                                      BTW, accordingly to datasheet those particular FETs has quite high D-S leakage up to 1 ยตA. But again, should not be an issue. Perhaps, while you're here and have tools to measure picoamps, you might be interested to grab a couple of those Femto N-FETs or other officially low leakage transistors, just to compare them to others. In particular, put them against a usual FET in the super-cutoff state, i.e. when supplying negative gate-source voltage.

                                      And, of course, I wish you best of luck with this experiment :biohazard_sign: and look forward for your updates! :hand_with_index_and_middle_fingers_crossed:

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                                      wrote on last edited by NeverDie
                                      #171

                                      @Mishka said in ๐Ÿ’ฌ The Harvester: ultimate power supply for the Raybeacon DK:

                                      For this reason there is no need to carefully select the transistors - everything that has appropriate gate threshold value should work just fine.

                                      You've highlighted an essential point, which is what I too had thought, and yet the simulations (and I'm using the SPICE models provided by the manufacturers of the MOSFET parts) indicate that its much easier to get some NFETs than others to oscillate in this particular kind of circuit. Give it a try yourself and see. And it turns out Vgs(th) alone is not a good predictor. Then it seemed Rds(on) was a good predictor, but I seem to have just recently found a counter-example to that. Let me know if you have any insight. It would be good to know what what makes for a good MOSFET pick. I hope it's not just a reflection of how good or bad the component models are. That is a big reason why I want to build something right away: to see if it's true or whether the simulations are poor fidelity. If the latter, hopefully not all of them are, and maybe there are some red flags I/we can identify in advance as to which models might be good and which not. Or, failing that, maybe some manufacturers do a better modeling job than others, and knowing in advance who makes good models would steer me toward picking their mosfets.

                                      Unfortunately, one un-related finding I've discovered about this circuit is that high gigaohm resistors seem to be quite expensive! Who'd have thought that about resistors? I had assumed they would be dirt cheap, but above about 1 or 2 gigaohm the part price starts to rapidly rise. :anguished:

                                      Anyhow, from a practical standpoint, I'd rather not rely on high gigaohm resistances, because if those are used then suddenly the leakiness of everything (PCBs, insulation, practically everything) will likely become more of a factor in how the circuit behaves, and mainstream fabrication isn't geared up for that.

                                      So I'll try building these circuits, even if I have to deadbug them, to answer the question about simulation fidelity, but then I'm hoping the next step will be low leakage components and/or leakage suppression by circuit design, such as DLS, because maybe then regular fabrication methods and materials will be good enough, and we'd be spared the cost of expensive resistors too. :face_with_rolling_eyes:

                                      P.S. I found a source that has SIP32431DR3T1GE3 in stock, so I ordered some. I think my highest hopes are now with that. Unfortunately, there are no SPICE models of it, but maybe tweaking down the DS leakage and GS leakage of a pre-built model for a different PFET would approximate it? After all, Vishay did say (in their response that I posted earlier above) that it is as largely a PFET. I also ordered some FemtoFETs, despite my reservations (above) about their incredibly small size--maybe we'll uncover DIY-friendly way to cope with that.

                                      Edit1: Looking into it more, one of the differences between the nfet's is that some can oscillate when the resistor values are 1G and above, whereas others cannot. For instance, DMC2700UDM-7 is one that can't seem to manage it. It's "problem" seems to be that the voltage dropped across it is a lot less than the input voltage. Now, it does have a low RDS(on), but so does SiSA40DN (see circuit above), but SiSA40DN has a higher threshold voltage. Not sure if there are other factors, but apparently even with less of a current flowing through it, due to the higher resistor values, somehow SiSA40DN manages to not switch until more of a voltage develops across it. Not sure how to express that--maybe you do?--but I think that may be the crux of what makes it better in this type of circuit, because it's the voltage dropped across it which is what triggers the next nfet in the sequence. It would appear that there's some kind of relation between the VGS curve and the RDS curve which makes one NFET better than the other for this type of circuit. And when you think about it, the resistance across the nfet has to be a lot more than 1G in order for most of the voltage to be dropped across it, which means that the switching needs to happen at less than VG(th), which it does. So, perhaps it's the bias current flowing into the gate which is the critical factor? That would be controlled by the resistor value. Maybe DMC2700UDM-7 needs more bias current than SiSA40DN does, and so that's why it works only with resistors less than 1Gohm? I'm not sure whether or not there's even a datasheet entry for mosfet gate bias current (would it be gate resistance? gate capacitance? Total gate charge? Some combination of those? Is maybe gate-drain leakage a factor? Something else?), though I know for op-amps it's called out explicitly as an important figure of merit. Hmmm......

                                      Edit2: It's confirmed. By placing simulator ammeters inline with the gates of the mosfets, it's clear that the gate on each DMC2700UDM-7 consumes 73pa in steady state, whereas the gate on SiSA40DN consumes less than 3pa. Also, during the transitions, the gate on DMC2700UDM-7 consumes around 900pa, whereas the gate on SiSA40DN consumes about half that. So, maybe that has something to do with with why DMC2700UDM-7 can't oscillate with gigaohm reistances? And, if so, what entry on the datasheet reflects that? Curiously, the source gate leakage in the reverse direction is far worse with the SiSA40DN (about 30pa) than with the DMC2700UDM-7 (less than 1pa).

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                                        wrote on last edited by NeverDie
                                        #172

                                        I think I likely found the smoking gun difference between the two mosfets. What's peculiar about them is that their Idss and Igss datasheet entries have values that are flipped with respect to one another:

                                        SIRA80DP_DS_Leakage.png

                                        DMC2700UDM_DS_leakage.png

                                        I think I trust the Diodes Incorporated datasheet a bit more, because they supply more detailt about the issue:
                                        DMC2700UDM_DS_leakage_2.png
                                        DMC2700UDM_DS_leakage_3.png
                                        whereas the Vishay datasheet is otherwise silent about it. If Vishay actually had a great DS leakage figure, wouldn't it have mentioned it in its intro paragraph? But no, it wasn't called out anywhere else in the Vishay datasheet.

                                        The DS leakage of the DMC2700UDM-7 plays out in the simulation to its detriment, and I think it probably explains why the voltage drop across it is so low compared to the Vishay mosfet:
                                        problem_at_100MegaOhm.png
                                        problem_at_1Gohm.png
                                        With the 1Gigaohm resistor in place, the DMC2700UDM-7 is showing a DS leakage of 2na, versus just 53pa for the Vishay. Quite a difference! The differences in voltages across the mosfets is equally striking (11mv vs. a full 2v), and, given the above test setup, I presume the difference is entirely due to the difference in leakage currents. With the gigaohm resistor, virtually all of the current entering the Diode's mosphet is lost due to leakage, leaving almost no voltage left.

                                        I just hope the Vishay lives up to its billing and that their product delivers on what their SPICE model promises. I hope it's not a confusion that's been written into Vishay's SPICE model. However, right now, if I'm reading and interpreting it right, it looks as though the Vishay SPICE model results don't correlate with what the Vishay datasheet says: according to the Vishay datasheet, it appears that the Vishay DS leakage should actually be worse than the Diodes Incorporated mosphet's, but (as shown above) the Vishay SPICE simulation results don't show that at all. Instead, far from that, according to the Vishay SPICE model, the Vishay appears to be 2 orders of magnitude better. Meh, I'll be happy if it's so, but I'm starting to doubt it. Unfortunately, the much worse Vishay datasheet entry was measured at 30v, so it's not directly comparable to the Diodes's 20v, so maybe....? For sure, I'll be testing Idss on the real Vishay product, and then we'll know for certain.

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                                        • NeverDieN Offline
                                          NeverDieN Offline
                                          NeverDie
                                          Hero Member
                                          wrote on last edited by NeverDie
                                          #173

                                          As a "Plan B," I tried simulating a ring oscillator using super-beta transistors, and the results are turning out surprisingly well:
                                          superbeta.png

                                          The downside, as before, is that it relies on high gigaohm resistors to achieve the low current consumption, but the waveform nonetheless looks pretty sharp, and the frequency can be adjusted faster or slower by the capacitor selection. According to the simulation, at 2.5v, this one consumes less than 800pa. And, as you would expect, current consumption is less at lower voltages, but obviously then you get a less useful voltage swing.

                                          Mouser sells some 1206 SMD 10Gohm resistors at $1.18 each (quantity 10), but at 25% tolerance. I expect even a 25% tolerance is probably acceptable for a circuit like this, and so resistor cost need not be a show stopper.

                                          I may actually end up preferring this circuit over the others. It seems like it may be a "good enough" fit for the solar cell that I'm using. :)

                                          By increasing the ohms on the resistors feeding the resistor bases, you can increase the swing voltage even more:
                                          maximize_voltage_swing.png
                                          That might be useful for using this circuit to control some other circuit.

                                          To date I've had no luck getting any of the leakage supression circuits to work in simulation. It would help a lot if someone reading this could suggest a circuit to try--something more detailed than what's presented in the academic papers we've already identified.

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