Powering mote 24/7 using only a supercap and solar
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@scalz said:
+1 for X5R/X7R ;)
I looked into it a little bit more, and I'm defaulting to X7R for everything, unless there's good reason not to: https://www.maximintegrated.com/en/app-notes/index.mvp/id/5527 The article also provides good reason to favor larger package sizes, up to size 1210, if the design allows.
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I've settled on this series of shielded inductor as having a good bang for buck ratio: low DCR, high current rating, and relatively low price: http://www.digikey.com/catalog/en/partgroup/dg-series/53965?mpart=1255AY-220M=P3&vendor=490
If anyone knows of a better series than that one, please post.
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For comparison, I ordered an inexpensive ($0.91, including shipping) 6v panel: https://www.aliexpress.com/item/6V-0-6W-Solar-Power-Panel-Module-DIY-Small-Cell-Charger-For-Light-Battery-Phone-Toy/32723002222.html?spm=2114.13010608.0.0.OYll8L
It's a little bigger, but still reasonably small (a little more than 2"x3" in size). Mainly, though, the energy harvesting chips that work at very low voltages are surprisingly expensive, so maybe this higher voltage panel will allow the use of less expensive chips that have higher start voltages. Of course, indoors I don't expect it will ever get to a full 6v under load, but I do expect that under the same lighting conditions it will offer up higher voltages at the same load as the cheap garden solar cell referenced in the OP.
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@scalz I was just now noticing that you like to put silkscreen between component pads:
Does silkscreen work the same as solder mask, in that it sorta "repels" molten solder away from it? I really don't know, but I've been assuming that it doesn't. In fact, I've gone out of my way to move silkscreen away from the solder pads out of fear it might contribute to inadvertent solder bridging between pads.
Anyone know?
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@NeverDie
well, sometimes i think to not put them at all! especially when i want to make things compact..at a moment, it becomes difficult to fit them, and you can't reduce fontsize because it's ugly. usually, i use 32mils.I've never had short because of this though.
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@NeverDie
well, sometimes i think to not put them at all! especially when i want to make things compact..at a moment, it becomes difficult to fit them, and you can't reduce fontsize because it's ugly. usually, i use 32mils.I've never had short because of this though.
@scalz said:
@NeverDie
well, sometimes i think to not put them at all! especially when i want to make things compact..at a moment, it becomes difficult to fit them, and you can't reduce fontsize because it's ugly. usually, i use 32mils.I've never had short because of this though.
Actually, I wasn't referring so much to the letters and numbers--which are off to the side-- so much as the little dashes and lines that appear between the pads. The letters and numbers are useful.
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I know, you're right, these are useful ;)
but when doing compact stuff, it's not always easy to display everything well..
I usually have my computer display in front of me when assembling, or i print the layout x4..so i don't look at the silkscreen so much..About "repels", if i understand right, i have never got short during soldering. I think you mean silkscreen, between parts, would help to bridge soldering? but no never got problem.
I often use stencil+reflow oven, so there is only the solder needed. For proto, generally i almost assemble at hand, still no problem :) -
In that case, maybe it's a non-issue, which would be good to know for future reference.
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@scalz I was just now noticing that you like to put silkscreen between component pads:
Does silkscreen work the same as solder mask, in that it sorta "repels" molten solder away from it? I really don't know, but I've been assuming that it doesn't. In fact, I've gone out of my way to move silkscreen away from the solder pads out of fear it might contribute to inadvertent solder bridging between pads.
Anyone know?
I see now why your board has 10 resistors instead of TI's reference schmatic's 9 resistors. It's because there doesn't seem to exist an off-the-shelf 15.62M-Ohm 0609 resistor, even though TI apparently thinks such a component does exist. I know Digikey doesn't stock any 15.62M-Ohm 0609 resistors, that's for sure. So, your two series resistors are probably a 15M-Ohm resistor and a 620K-Ohm resistor, both of which Digikey sells.
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I see now why your board has 10 resistors instead of TI's reference schmatic's 9 resistors. It's because there doesn't seem to exist an off-the-shelf 15.62M-Ohm 0609 resistor, even though TI apparently thinks such a component does exist. I know Digikey doesn't stock any 15.62M-Ohm 0609 resistors, that's for sure. So, your two series resistors are probably a 15M-Ohm resistor and a 620K-Ohm resistor, both of which Digikey sells.
@scalz
I worked out the following as the mapping from resistor labels on your board to resistor values (assuming the target is Figure 14 from the DS):
R1 = 4.42M
R2 = 15M
R3 = 620K
R4 = 1.43M
R5 = 4.22M
R6 = 4.42M
R7 = 4.02M
R8 = 5.9M
R9 = 4.42M
R10 = 5.6M -
i don't remember, i'll look at this later. but i posted the schematic some posts above if it can help.
From the fab I've already received my board, your board, and obvioiusly the "stripped" board (photos above). On Thursday I should receive from Digikey resistors with precisely the values in the above list. I'll then be able to finish assembling the boards and see how their performance compares. TI has a paper for measuring the BQ25504 efficiency: http://www.ti.com/lit/an/slua691/slua691.pdf
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From the fab I've already received my board, your board, and obvioiusly the "stripped" board (photos above). On Thursday I should receive from Digikey resistors with precisely the values in the above list. I'll then be able to finish assembling the boards and see how their performance compares. TI has a paper for measuring the BQ25504 efficiency: http://www.ti.com/lit/an/slua691/slua691.pdf
@scalz
I assembled both your board and my board today and did a quick test. The good news is that both boards appear to function with a cold start voltage of about 330mv, and for that reason it appears that both boards outperform the Tindie board. I am guessing that is, at least in part, because they use one of the datasheets recommended inductors, as compared to the Tindie Board, which does not appear to. -
I've played with the BQ25504 boards only a little bit thus far, but the truth that the datasheet glossed over in the executive summary section is that at the very low voltages (330mv+), the efficiency is terrible up until it charges up the caps to reach a threshhold voltage of around 2 volts or so. Those ultra-low voltages are the "cold start" phase, and the aim of that is, apparently, to bootstrap itself using available energy up to the threshhold voltage (maybe there's a better term for it). So, the trick to using this chip appears to be to maintain at least the threshhold voltage on the caps. You really don't want to ever invoke the cold start mechanism, because the the cold start efficiency appears to be quite miserable. So, while it is true to say that it works at ultra low voltages, it's just a partial truth that leaves a lot unsaid.
So, if one starts with the assumption that a relatively high voltage (say 2 volts, give or take) must be maintained on the caps in order for this to be practical, it really has me wondering now how this chip compares to other boost chips under the same assumptions. Fortunately, I have test boards for a number of different kinds of boost chips already in the pipeline. :smile:
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I've played with the BQ25504 boards only a little bit thus far, but the truth that the datasheet glossed over in the executive summary section is that at the very low voltages (330mv+), the efficiency is terrible up until it charges up the caps to reach a threshhold voltage of around 2 volts or so. Those ultra-low voltages are the "cold start" phase, and the aim of that is, apparently, to bootstrap itself using available energy up to the threshhold voltage (maybe there's a better term for it). So, the trick to using this chip appears to be to maintain at least the threshhold voltage on the caps. You really don't want to ever invoke the cold start mechanism, because the the cold start efficiency appears to be quite miserable. So, while it is true to say that it works at ultra low voltages, it's just a partial truth that leaves a lot unsaid.
So, if one starts with the assumption that a relatively high voltage (say 2 volts, give or take) must be maintained on the caps in order for this to be practical, it really has me wondering now how this chip compares to other boost chips under the same assumptions. Fortunately, I have test boards for a number of different kinds of boost chips already in the pipeline. :smile:
A closer reading of the cold start section of the datasheet (Section 8.4) confirms my initial observations. VSTOR_CHGEN is what I was calling the "threshhold voltage" and is typically around 1.8v. VSTOR must be greater than VSTOR_CHGEN before cold start ends. The datasheet conceeds that cold start runs an "inefficient" boost converter. Just how inefficient? Well, I haven't seen any curves in the datasheet that answer that precisely (perhaps they were deleted by the marketing department?). Apparently, if you want to know that vital information, you have to compile your own data. I guess TI either doesn't know themselves (unlikely), or they're just not sharing.. Gee, thanks TI
However, the reality is worse than what I initially surmised, especially if using a supercap: That's because a discharged supercap will crash VSTOR, and so the chip could remain stranded in cold-start mode. Quoting the datasheet: "When large, discharged super capacitors with high DC leakage currents are attached, the intial charge time can be signficant." Yeah, no kidding. But, it appears there's also a notion for how to workaround this problem: "It is highly recommended to add an external PFET between the system load and VSTOR. An inverted VBAT_OK signal can be used to drive the gate of this system-isolating, external PFET."
So..... now I need to figure out the brass tacks of how to do that and probably redo the PCB to include such a PFET.
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I think I'll try using a load switch. That way I can use the BAT_OK signal directly, without having to invert it. What I don't presently know is how fast the BAT_OK signal changes. If it lags considerably, then there's a risk that VSTOR might fall back into the cold start region before the current draining from vstor into the supercap can be shut off.
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I found this curve:
not in the datasheet, but here: http://www.ti.com/lit/ml/slpt026a/slpt026a.pdfYou'll note that it shows VSTOR = 3.0V, which I think is probably key to getting anything worthwhile from this chip. Anyhow, as long as VSTOR=3.0V, it's a pretty impressive curve.
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TI makes an "ultra low leakage load switch" which might be a good fit: http://www.ti.com/lit/ds/symlink/tps22860.pdf
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TI makes an "ultra low leakage load switch" which might be a good fit: http://www.ti.com/lit/ds/symlink/tps22860.pdf
OK, I just put together a breakout board for the TPS22860 to audition it for this new role. I just now sent it to the fab, so it will be another two weeks (!) before I'll know. I just hate how these fab iterations stretch these projects out far too long.
